Quiz: The Fetch-Decode-Execute Cycle
OCR GCSE J277 Computer Science specification
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Building on what you've learned about the CPU, let's test your knowledge of how it processes instructions through the Fetch-Decode-Execute Cycle!
What is the first step in the Fetch-Decode-Execute Cycle?
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Which of the following are parts of the Fetch-Decode-Execute Cycle? (Select all that apply)
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The {{blank0}} register holds the address of the next instruction to be fetched, while the {{blank1}} register holds the actual instruction or data.
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What happens during the decode stage of the Fetch-Decode-Execute Cycle?
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The CPU is running at 3 GHz. How many cycles does it complete in one second?
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Which register is responsible for holding the intermediate calculation results during the Execute stage?
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What factors affect the CPU's performance during the Fetch-Decode-Execute Cycle? (Select all that apply)
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Match the items on the left with their correct pairs on the right
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