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Learn: The Fetch-Decode-Execute Cycle
OCR GCSE J277 Computer Science specification
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Welcome!Building on what you've already learned about the CPU and its importance, we'll explore how it processes instructions using the Fetch-Decode-Execute Cycle.
What is the Fetch-Decode-Execute Cycle?The Fetch-Decode-Execute Cycle is the process the CPU uses to carry out instructions from a program. It involves fetching the instruction, decoding it to understand what to do, and executing it to perform the operation.
Step 1: FetchThe CPU retrieves the next instruction from memory using the Memory Address Register (MAR) and the Memory Data Register (MDR). The address of the next instruction is stored in the Program Counter (PC).
Quick check: Which register holds the address of the next instruction to be fetched?
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Step 2: DecodeOnce the instruction is fetched, the Control Unit (CU) interprets it. Decoding involves converting the instruction into signals that tell the CPU what action to perform.
The {{blank0}} interprets the instruction and sends signals to carry out the operation.
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Step 3: ExecuteIn the execute stage, the Arithmetic Logic Unit (ALU) performs operations such as calculations or logical comparisons. The Accumulator temporarily holds the result of these operations.
Quick check: What does the ALU do during the execute stage?
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The Registers InvolvedSeveral registers play key roles in the cycle: Program Counter (PC) stores the address of the next instruction, Memory Address Register (MAR) holds the memory location, Memory Data Register (MDR) stores the data fetched from memory, and Accumulator holds intermediate results.
Match the items on the left with their correct pairs on the right
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Review Time!Great work! You've learned about the Fetch-Decode-Execute Cycle and how the CPU processes instructions. Now let's test your understanding with a few questions.
Which of the following are stages of the Fetch-Decode-Execute Cycle? (Select all that apply)
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The {{blank0}} temporarily holds the result of calculations performed by the ALU.
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Which register holds the memory location during the fetch stage?
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