1.1.1(a) Flashcards

- it's a core computational part of the CPU - it's a digital circuit - it's performs bitwise operations, so it shifts binary patterns to the left/right - it performs all arithmetic and logical operations

- it operates under control signals, by the control unit - it gets the operands (data) from the registers -then it performs the operation -the results gets stored back into ACC/memory

- because it allows the CPU to perform mathematical calculations and decision making

- it's the main component of the CPU - it's hardwired -> fast and inflexible(so it doesn't change) - it's microprogrammed -> easy and slow to update - it directs operations of the CPU - so it tells each component what to do and when

- it sends control signals - via the control bus - to coordinate all hardware components of the CPU - it also decodes instructions in memory (CIR)

- it synchronizes and controls the flow of data - this means that instructions are executed in the correct time and order - As a result, the processor can keep control of the logical flow so that it can coordinate tasks

-it's a small, fast memory location in the CPU - which stores temporary instructions + data

- stores status flags - e.g. zero, carry, negative overflow - it's used by the ALU to signal results - so it's used in the ALU subsystem

- stores the address of the next instruction - to fetch - linked to branching (control flow)

- stores the result of the calculations - that's calculated by the ALU - so it decreases access of RAM - for every result

- stores the address of the data/instruction - to be fetched from/ written to - so it works with the address bus

- temporarily stores the data/instruction - that's currently being fetched from/written to memory - so the data travels via the data bus

- holds the current instruction - that's being decoded/executed - so it directly links to the instruction decoding in the CU

- it's a shared communication system - that transfers address/data/control signals

- data bus - address bus - control bus

- direction -> bi-directional -> e.g. ACC <-> MDR <-> memory - purpose -> carries actual data + instruction - between the CPU, memory and I/O devices

- direction ->uni-directional -> so only from CPU to memory - e.g. PC-> MAR->address bus - purpose -> it carries the address of the memory location to be read/written

- direction -> bi-directional - e.g. CU to other components - purpose -> carries control signals to manage the flow of data (so it transfers clock/interrupt/read/write)

- I/O read -I/O write - memory read/write - clock signals - interrupts

- because it improves communication and sequential execution of instructions - because it prevents data collisions by using synchronized control signals

1) The CU controls timing and sends control signals 2) Then the PC provides the address of the next instruction 3) Then the MAR stores the address to be fetched from 4) Then the CIR holds and decodes the data + instruction 5) The the ALU executes the data that's stored in ACC/MDR 6) Then the result get stored back into the ACC/memory